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git-svn-id: http://svn.freeswitch.org/svn/freeswitch/trunk@17026 d0543943-73ff-0310-b7d9-9358b9ac24b2
142 lines
6.1 KiB
C
142 lines
6.1 KiB
C
/***********************************************************************
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Copyright (c) 2006-2010, Skype Limited. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, (subject to the limitations in the disclaimer below)
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are permitted provided that the following conditions are met:
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- Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of Skype Limited, nor the names of specific
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contributors, may be used to endorse or promote products derived from
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this software without specific prior written permission.
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NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED
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BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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CONTRIBUTORS ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING,
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BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
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FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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***********************************************************************/
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/* *
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* SKP_Silk_LPC_synthesis_order16.c *
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* Coefficients are in Q12 *
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* *
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* 16th order AR filter *
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* */
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#include "SKP_Silk_SigProc_FIX.h"
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/* 16th order AR filter */
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void SKP_Silk_LPC_synthesis_order16(const SKP_int16 *in, /* I: excitation signal */
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const SKP_int16 *A_Q12, /* I: AR coefficients [16], between -8_Q0 and 8_Q0 */
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const SKP_int32 Gain_Q26, /* I: gain */
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SKP_int32 *S, /* I/O: state vector [16] */
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SKP_int16 *out, /* O: output signal */
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const SKP_int32 len /* I: signal length, must be multiple of 16 */
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)
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{
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SKP_int k;
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SKP_int32 SA, SB, Atmp, A_align_Q12[8], out32_Q10, out32;
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/* combine two A_Q12 values and ensure 32-bit alignment */
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for( k = 0; k < 8; k++ ) {
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A_align_Q12[k] = (((SKP_int32)A_Q12[ 2*k ]) & 0x0000ffff) | SKP_LSHIFT( (SKP_int32)A_Q12[ 2*k + 1 ], 16 );
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}
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/* S[] values are in Q14 */
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/* NOTE: the code below loads two int16 values in an int32, and multiplies each using the */
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/* SMLAWB and SMLAWT instructions. On a big-endian CPU the two int16 variables would be */
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/* loaded in reverse order and the code will give the wrong result. In that case swapping */
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/* the SMLAWB and SMLAWT instructions should solve the problem. */
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for( k = 0; k < len; k++ ) {
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/* unrolled loop: prolog */
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/* multiply-add two prediction coefficients per iteration */
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SA = S[15];
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Atmp = A_align_Q12[0];
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SB = S[14];
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S[14] = SA;
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out32_Q10 = SKP_SMULWB( SA, Atmp );
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out32_Q10 = SKP_SMLAWT_ovflw( out32_Q10, SB, Atmp );
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SA = S[13];
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S[13] = SB;
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/* unrolled loop: main loop */
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Atmp = A_align_Q12[1];
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SB = S[12];
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S[12] = SA;
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out32_Q10 = SKP_SMLAWB_ovflw( out32_Q10, SA, Atmp );
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out32_Q10 = SKP_SMLAWT_ovflw( out32_Q10, SB, Atmp );
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SA = S[11];
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S[11] = SB;
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Atmp = A_align_Q12[2];
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SB = S[10];
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S[10] = SA;
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out32_Q10 = SKP_SMLAWB_ovflw( out32_Q10, SA, Atmp );
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out32_Q10 = SKP_SMLAWT_ovflw( out32_Q10, SB, Atmp );
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SA = S[9];
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S[9] = SB;
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Atmp = A_align_Q12[3];
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SB = S[8];
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S[8] = SA;
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out32_Q10 = SKP_SMLAWB_ovflw( out32_Q10, SA, Atmp );
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out32_Q10 = SKP_SMLAWT_ovflw( out32_Q10, SB, Atmp );
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SA = S[7];
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S[7] = SB;
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Atmp = A_align_Q12[4];
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SB = S[6];
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S[6] = SA;
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out32_Q10 = SKP_SMLAWB_ovflw( out32_Q10, SA, Atmp );
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out32_Q10 = SKP_SMLAWT_ovflw( out32_Q10, SB, Atmp );
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SA = S[5];
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S[5] = SB;
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Atmp = A_align_Q12[5];
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SB = S[4];
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S[4] = SA;
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out32_Q10 = SKP_SMLAWB_ovflw( out32_Q10, SA, Atmp );
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out32_Q10 = SKP_SMLAWT_ovflw( out32_Q10, SB, Atmp );
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SA = S[3];
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S[3] = SB;
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Atmp = A_align_Q12[6];
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SB = S[2];
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S[2] = SA;
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out32_Q10 = SKP_SMLAWB_ovflw( out32_Q10, SA, Atmp );
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out32_Q10 = SKP_SMLAWT_ovflw( out32_Q10, SB, Atmp );
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SA = S[1];
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S[1] = SB;
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/* unrolled loop: epilog */
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Atmp = A_align_Q12[7];
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SB = S[0];
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S[0] = SA;
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out32_Q10 = SKP_SMLAWB_ovflw( out32_Q10, SA, Atmp );
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out32_Q10 = SKP_SMLAWT_ovflw( out32_Q10, SB, Atmp );
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/* unrolled loop: end */
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/* apply gain to excitation signal and add to prediction */
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out32_Q10 = SKP_ADD_SAT32( out32_Q10, SKP_SMULWB( Gain_Q26, in[k] ) );
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/* scale to Q0 */
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out32 = SKP_RSHIFT_ROUND( out32_Q10, 10 );
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/* saturate output */
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out[k] = (SKP_int16)SKP_SAT16( out32 );
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/* move result into delay line */
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S[15] = SKP_LSHIFT_SAT32( out32_Q10, 4 );
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}
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}
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